Common-Source Amplifier with Current-Source Load

Common-Source Amplifier with Current-Source Load

The amplifier in this part is the same, in principle, as the basic common-source amplifiers of Figs. 2.4 and . However, now the actual resistor R_D is replaced with a current-source load as shown in the circuit of Fig. 10.1. As noted in Unit 9, a benefit of replacing bias resistors with current sources is a reduced requirement for resistors in the circuit; the reference voltage associated with M₃ can be used elsewhere in a typical circuit. Additionally, as will be shown, the gain of the common-source stage is substantially imp 313e418d roved over that with actual bias resistor R_D. The specific circuit of Fig. 10.1 is that for the project amplifier. The bias and gain of the amplifier are evaluated in the following.

Figure 10.1. Common-source amplifier with driver transistor M₁ and current-source load from drain of M₂. In the amplifier project, an output channel sets V_G1 for a given current and another output channel will search for the V_SS to set up bias V_O = V_DD/2. For the signal measurements, a signal voltage is superimposed on the dc V_G1.

10.1 DC (Bias) Circuit

The bias circuit is critical in terms of getting the dc output voltage at a value near the project design value of V_O = V_DD/2 (for maximum output magnitude and linearity). The relation, from the dc circuit analysis, for obtaining this condition is based on I_D1 = I_D2. This is, in terms of the transistor characteristic equations, (

Equation 10.1

Note that the source-gate voltage of M₂ is referenced to M₃. A certain combination of V_GS1 and V_SS will satisfy V_o = V_DD/2. In the project on the amplifier, a LabVIEW VI sends out a V_G1 = V_GS1 to set up a given I_D1 = I_D2 and then adjusts V_SS to obtain the desired bias output voltage.

Figure 10.2 shows a SPICE plot of the current for the PMOS and NMOS transistors as a function of V_DS1. The source - drain voltage for the PMOS is V_SD2 = V_DD - V_DS1. Both transistors have a specific gate - source voltage. The solution for the output voltage for this case is about 3 V. A slight decrease in V_GS1 or a slight increase in V_SG2 is required to bring V_DS1 to 5 V, the design result in this example. The increase in V_SG2 would be implemented by making V_SS more negative to increase the reference current. The steeper slope in the active region of the PMOS device is consistent with l_p > l_n, as in the project amplifier.

Figure 10.2. Plot of driver and load transistor output characteristics on common voltage scale. Since I_D1 = I_Dn = I_D2 = I_Dp, V_DS1 = V_O is where currents intersect. The current from the current source load needs, in this example, to be slightly increased to set V_DS1 = V_O, with V_DD = 5V.

10.2 Signal Voltage Gain

The expression for the gain of the basic common-source amplifier, ( ), which includes the output resistance of the driver transistor, is

In the signal circuit, as shown in Fig. 10.3, R_D is replaced by 1/g_ds2. The new equation for this circuit is

Equation 10.2

Figure 10.3. Linear circuit of the common-source amplifier. The load is now the output resistance of the current source load, 1/g_ds2.

or with g_m = 2I_D/V_eff, ( ), and g_ds I_D l

Equation 10.3

The result shows that the gain increases for decreasing V_effn1. This is limited by the fact that the MOSFET ceases to behave in the normal manner at some lower limit on V_effn.

Using an alternative form is obtained, which reveals the I_D1 dependence of the gain. This is

Equation 10.4

Increasing gain is achieved with decreasing the level of bias current. The lower limit is, as noted above, associated with a lower limit on V_effn. Also, there is an approximate inverse trade-off between frequency response limitations, on the high end of the spectrum, and gain.

The gain, though, for the amplifier with current source load, will generally be several times as large as that with the resistive load. An amplifier with even higher gain can be obtained by replacing the current source load with one with source degeneration as discussed in Unit 9.2, and as discussed extensively for the case of the BJT in Unit C

10.3 Summary of Equations

10.4 Exercises and Projects